Task Force Low Power

GET THE LATEST on TOOLS presented in TF Low Power Meetings:

* Andrea Bartolini et al. A Virtual Platform Environment for Exploring Power, Thermal and Reliability Management Control Strategies in High-performance Multicores.

* Goel et al. Per-Core Power Estimation for CMPs.

* Uppsala/Patras: Power‐Performance Adaptation in Intel Core i7

REPORTS
Disruptive Solutions for Energy Efficient ICT Expert Consultation Workshop 8 & 9 February 2010

ANNOUNCEMENT
TF on Low Power Barcelona Meeting: Practical Approaces to Low Power Research:
In the TF Low Power Barcelona meeting we will do two mini tutorials on practical approaches to low power research.
The first tutorial will be given by Georgios Keramidas, Vasileios Spiliopoulos, and Pavlos Petoumenos (ISI, Uppsala, Patras) and will be about high resolution, fine measurements of power consumption of real hardware, and specifically Intel's i7 multicore. The power measurements concern specifically the processor and not irrelevant parts of the motherboard.
Following that, Sally McKee will give a related presentation on measuring power and modeling power using performance counters.
For the remainder of the meeting the participants will be invited to share their experiences with real world power work.

Objectives

The HiPEAC2 Low-Power Task Force is intended to be a focal point low-power research within the HiPEAC community. Our goal is to foster, promote, and support research and related activities on low-power.

A few items on the agenda are:

• Set up a framework for contributions to the HiPEAC Roadmap
• Discuss ideas on how promote low-power research, especially for MPSoCs/CMPs: identify issues and approaches
• Discuss infrastructure for low power research (simulation, tools, etc)
• Propose activities during major HiPEAC events (summer school, upcoming HiPEAC conferences)

Tools

• [http://cseweb.ucsd.edu/users/tullsen/micro09b.pdf]: McPat, A New Power-Modeling Methodology
• UNISIM: UNIted SIMulation environment, Modularity for Reusability and Interoperability.
• Wattch: Wattch 1.02, original version of Wattch code and modified version for better system portability.
• Hot Leakage: Software model of leakage.
• Cacti: Integrated cache and memory access time, cycle time, area, leakage, and dynamic power model.
• Simics: Full system simulation platform.
• Xeemu: Configurable runtime and power simulator for the Intel(c) XScale(c) architecture.

Members

Useful Material / Publications / Books

• Stefanos Kaxiras and Margaret Martonosi: Computer Architecture Techniques for Power-Efficiency. Mark D. Hill Series Editor, Publisher: Morgan and Claypool Publishers; 1 edition (June 13, 2008).

Papers

• Sheng Li et al. : [http://cseweb.ucsd.edu/users/tullsen/micro09b.pdf]McPAT: An Integrated Power, Area, and Timing Modeling

Framework for Multicore and Manycore Architectures

• Daniele Ludovici, et al.: Integration of Power Saving Techniques in the UNISIM Simulation Framework through the Shadow Module design paradigm. Appeared in Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), 2009.

Other Resources

(Work in progress...)

Please send your contributions to: Stefanos Kaxiras